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Mentor Graphics: Target for SilverLake?

Posted on Monday, Apr 11th

Mentor Graphics is No. 3 in the Electronics Design Automation (EDA) market, after Cadence and Synopsys. The EDA market itself is not that large, roughly $4 Billion, declining rapidly to $3.5 Bilion due to its tough price-wars. Such a market cannot support 3 major players, and Mentor ought to be a classic acquisition target for

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Chip VCs: Enhanced “nerd” factor needed

Posted on Wednesday, Apr 6th

I mentioned Chip Scale Packing (CSP), which I should also explain further. In simple terms, for these miniaturized consumer devices, Printed Circuit Board (PCB) real estate is a big problem. CSP is a packaging technology that allows chips to be packaged “at the scale of the chip” with marginally more area requirement. In recent times,

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SiP is a major discontinuity

Posted on Wednesday, Apr 6th

Okay, so I should explain what is the big deal about System-in-Package (SiP) … You must have noticed the trend in cellular handsets of packing in dramatically diverse functionality? Samsung’s latest model has a 5 Mega Pixel camera, and if this is any indication, consumers will further reap benefits of such integration trends in the

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SiP versus Structured ASICs

Posted on Tuesday, Apr 5th

Semiconductors and Electronics have invaded every aspect of our lives in fairly extensive ways. During the last quarter of the twentieth century, this segment received enormous attention, venture investment, and duly provided some amazing vision, thought leadership, and innovation. Now, in the first decade of the 21st Century, the industry is showing signs of hitting

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