I write this series with great pleasure, as my former graduate school advisor and renowned MIT professor Anant Agarwal unveils his so far stealth-mode company Tilera this week. Tilera could well be the next big breakthrough in processor design.
SM: Anant, please give us some background on where you come from. AA: Growing up, I wanted to be an engineer. I went to school in Mangalore and took the IIT entrance test. I did not have a lot of hope of getting in, and was surprised when it happened. At that time I was working on speech systems. I had been part of a team which built a speech recognition system for Hindi. Then I came to Stanford to work on speech and linear systems theory. Somewhere along the way I switched into computer architecture and began working with John Hennessey, and worked with him on the first MIPS computer. That was 1983.
SM: What was going on in the processor landscape at the time? AA: At that time, the big debate was the RISC versus CISC debate.
SM: You moved to MIT after your PhD? AA: Right. After my PhD, in 1987 I moved to MIT to be a professor, and have been teaching there for two decades now. The first thing we did there, was a project called Sparcle which was to build a multi-threaded processor. We demonstrated the chip in 1992. It was a SPAR
C based multithreaded chip in the early 1990s. This was a collaborative effort of MIT, Sun Microsystems, and LSI Logic. Brad Howard and others supported it from LSI, and Dave Ditzel from Sun Microsystems. We built the chip and demonstrated a working multi threaded chip.