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Verigy Recognizes Design-Test Integration Needs

Posted on Wednesday, Jun 25th 2008

Yesterday I talked about the trend of the design and test sides of the semiconductor industry coming together. The industry is moving towards inserting “testers” into chips, thereby eliminating/reducing the need for high-end testers in most cases. In the next few years, we will see tighter integration between design and testing, and potentially more conversations between the EDA and the ATE industries.

Verigy’s (VRGY) acquisition of Inovys is one such step towards integration. Verigy manufactures advanced test systems and solutions for the memory and system-on-chip segments of the semiconductor industry. The company was spun off from Agilent Technologies in 2006.

In January of this year, they announced the completion of their acquisition of Inovys. Inovys’ product suite includes design-for-test and design-for-manufacturing tools that enable semiconductor companies to reduce time spent on design debugging and thus lower test costs. These tools, combined with Verigy’s system-on-chip and memory test platforms, offer semiconductor manufacturers an integrated solution to reduce time-to-yield.

Verigy announced their Q2 financial results late last month. Revenue of $162 million, an annual reduction of 11% and a sequential reduction of 19%, was in line with Street expectations. Orders were sequentially flat at $177 million, registering a 12% reduction over the previous year’s orders of $202 million.

EPS of $0.23 beat the market’s expectations of $0.19 but was down 36% over the year and 55% over the previous quarter.

Despite the current economic pressures on and concerns about the fate of the ATE industry, Verigy’s outlook for the coming quarter was brighter than the market’s. For Q3, Verigy is expecting revenues of $170-$180 million with EPS of $0.24-$0.29.

The stock reacted favorably to the projections, jumping 11% to $25.19 following the announcement. It is back to trading at $22.87 today.

1yr VRGY

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Wow – I guess we’re thinking along the same lines here: I linked from my sie (DFT Digest) to your post on the Credence/LTX merger, and added the thought about the Verigy/Inovys deal – and now we have your analysis on that!

As a DFT guy, it’s worth keeping track of, because that’s the trend, and has been for many years. When I worked for TI, there was a huge effort in implementing as much DFT on-chip, so that designs could be tested on their in-house VLCT (Very Low Cost Test) tester, which had limited stim/response capability. It saved them a lot of money in the long-run.

John Ford Wednesday, June 25, 2008 at 2:34 PM PT

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